SystemInit（）函数：

void SystemInit (void)
{/* Set HSION bit */RCC->CR |= (uint32_t)0x00000001;//把内部的HSI RC（高速时钟）打开#ifndef STM32F10X_CLRCC->CFGR &= (uint32_t)0xF8FF0000;//这一句不会执行，由于定义的是STM32F10X_HD，他会执行else后的语句。
#elseRCC->CFGR &= (uint32_t)0xF0FF0000;//系统初始化状态
#endif /* STM32F10X_CL */   /* Reset HSEON, CSSON and PLLON bits */RCC->CR &= (uint32_t)0xFEF6FFFF;//默认状态/* Reset HSEBYP bit */RCC->CR &= (uint32_t)0xFFFBFFFF;//默认状态/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */RCC->CFGR &= (uint32_t)0xFF80FFFF;//默认状态#ifdef STM32F10X_CL/* Reset PLL2ON and PLL3ON bits */RCC->CR &= (uint32_t)0xEBFFFFFF;/* Disable all interrupts and clear pending bits  */RCC->CIR = 0x00FF0000;/* Reset CFGR2 register */RCC->CFGR2 = 0x00000000;
#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)/* Disable all interrupts and clear pending bits  */RCC->CIR = 0x009F0000;/* Reset CFGR2 register */RCC->CFGR2 = 0x00000000; //由于是STM32F10X_CL，所以ifdef后的语句不会执行     
#else/* Disable all interrupts and clear pending bits  */RCC->CIR = 0x009F0000;//把所有中断都关掉，位全部都清掉
#endif /* STM32F10X_CL */#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)#ifdef DATA_IN_ExtSRAMSystemInit_ExtMemCtl(); //这里没有执行，因为不是STM32F10X_HD#endif /* DATA_IN_ExtSRAM */
#endif /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers *//* Configure the Flash Latency cycles and enable prefetch buffer */SetSysClock();#ifdef VECT_TAB_SRAMSCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#elseSCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif 
}

SystemInit（）中的SetSysClock()函数部分：

static void SetSysClock(void)
{
#ifdef SYSCLK_FREQ_HSESetSysClockToHSE();
#elif defined SYSCLK_FREQ_24MHzSetSysClockTo24();
#elif defined SYSCLK_FREQ_36MHzSetSysClockTo36();
#elif defined SYSCLK_FREQ_48MHzSetSysClockTo48();
#elif defined SYSCLK_FREQ_56MHzSetSysClockTo56();  
#elif defined SYSCLK_FREQ_72MHz//这里的意思是判断标识符有没有被定义，定义了哪种就调用哪种设置系统时钟的函数。SetSysClockTo72();
#endif/* If none of the define above is enabled, the HSI is used as System clocksource (default after reset) */ 
}

这里是举例SetSysClockTo72()这个系统时钟函数：
FLASH_ACR是闪存访问控制寄存器

static void SetSysClockTo72(void)
{__IO uint32_t StartUpCounter = 0, HSEStatus = 0;/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    /* Enable HSE */    RCC->CR |= ((uint32_t)RCC_CR_HSEON);//外部高速时钟使能/* Wait till HSE is ready and if Time out is reached exit  do  while语句意思是等待HSE稳定 */do{HSEStatus = RCC->CR & RCC_CR_HSERDY;StartUpCounter++;  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));if ((RCC->CR & RCC_CR_HSERDY) != RESET){HSEStatus = (uint32_t)0x01;//HSEStatus是表示一种状态}//if语句是判断是否准备就绪else{HSEStatus = (uint32_t)0x00;}  if (HSEStatus == (uint32_t)0x01)//就绪后执行这一步{/* Enable Prefetch Buffer */FLASH->ACR |= FLASH_ACR_PRFTBE;///* Flash 2 wait state */FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
//cpu的速度比芯片的flash的速度快很多，所以在操作之前要等待时钟，这三句是对FLASH_ACR寄存器操作/* HCLK = SYSCLK */RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;//HCLK = SYSCLK就要设置AHB预分频为不分频  /* PCLK2 = HCLK */RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;//PCLK2 = HCLK就要APB2预分频预分频系数HCLK不分频/* PCLK1 = HCLK/2*/RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;//PCLK1 = HCLK/2就要APB1设置预分频系数HCLK的二分频
#ifdef STM32F10X_CL/* Configure PLLs ------------------------------------------------------*//* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz *//* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);/* Enable PLL2 */RCC->CR |= RCC_CR_PLL2ON;/* Wait till PLL2 is ready */while((RCC->CR & RCC_CR_PLL2RDY) == 0){}/* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLMULL9); 
#else    /*  PLL configuration: PLLCLK = HSE * 9 = 72 MHz */RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |RCC_CFGR_PLLMULL));RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);//RCC_CFGR_PLLSRC_HSE是将HSE作为PLL的时钟源，RCC_CFGR_PLLMULL9是将倍频系数设置为9
#endif /* STM32F10X_CL *//* Enable PLL */RCC->CR |= RCC_CR_PLLON;//使能PLL时钟/* Wait till PLL is ready  while语句等待PLL就绪*/while((RCC->CR & RCC_CR_PLLRDY) == 0){}/* Select PLL as system clock source 将PLL作为系统时钟来源*/RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    /* Wait till PLL is used as system clock source */while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08){}}else{ /* If HSE fails to start-up, the application will have wrong clock configuration. User can add here some code to deal with this error */}
}

总结一下：
SystemInit()函数中设置的系统时钟大小：

SYSCLK（系统时钟） =72MHzAHB 总线时钟(使用 SYSCLK) =72MHzAPB1 总线时钟(PCLK1) =36MHzAPB2 总线时钟(PCLK2) =72MHzPLL 时钟 =72MHz