STM32H750片外QSPI下载算法文件（stldr）生成

🌿相关篇《STM32H750片外QSPI启动配置简要》
📌参考实现资料：
- https://github.com/lchnu/STM32H750XBH_ARTPIQSPI_W25Q64JV
- https://gitee.com/wangchief/H750_W25QXX

✨利用以上资料中的任意一个，即可实现的是片外QSPI下载算法文件（stldr）的生成，（结合参考下面贴出的重要参考信息进行修改，即可实现。）可以方便针对STM32CubeProgrammer、STM32CubeIDE工具软件，对片外QSPI Flash进行下载。
🎉需要注意一点的是，上面的参考资料，对于大部分人手上的硬件，可能都不一样，需要有针对性的做调整和修改，才能用。

📍STM32H750片外QSPI下载算法文件（.FLM）生成，可以参考资料：https://www.armbbs.cn/forum.php?mod=viewthread&tid=101586

🔖片外QSPI下载算法文件（.FLM）文件是，针对MDK Keil开发环境需要使用到的。

⚡同样的（.FLM）文件通过STM32 ST-LINK Utility 4.6工具测试，无法烧录，使用STM32CubeProgrammer没有问题。

🔰（.stldr）文件和（.FLM）文件的生成,都是基于MDK KEIL工程生成的。工程并不是通用的。（利用生成.FLM的工程区生成.stldr文件是没法识别的。）

⛳移植重点

🌿QSPI引脚定义：（具体引脚根据硬件连接进行调整）

#define QSPI_CLK_ENABLE()               __HAL_RCC_QSPI_CLK_ENABLE()
#define QSPI_CLK_DISABLE()              __HAL_RCC_QSPI_CLK_DISABLE()
#define QSPI_CS_GPIO_CLK_ENABLE()       __HAL_RCC_GPIOB_CLK_ENABLE()
#define QSPI_CLK_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOB_CLK_ENABLE()
#define QSPI_BK1_D0_GPIO_CLK_ENABLE()   __HAL_RCC_GPIOD_CLK_ENABLE()
#define QSPI_BK1_D1_GPIO_CLK_ENABLE()   __HAL_RCC_GPIOD_CLK_ENABLE()
#define QSPI_BK1_D2_GPIO_CLK_ENABLE()   __HAL_RCC_GPIOE_CLK_ENABLE()
#define QSPI_BK1_D3_GPIO_CLK_ENABLE()   __HAL_RCC_GPIOD_CLK_ENABLE()#define QSPI_MDMA_CLK_ENABLE()          __HAL_RCC_MDMA_CLK_ENABLE()
#define QSPI_FORCE_RESET()              __HAL_RCC_QSPI_FORCE_RESET()
#define QSPI_RELEASE_RESET()            __HAL_RCC_QSPI_RELEASE_RESET()#define QSPI_CS_PIN                     GPIO_PIN_6   //注意修改
#define QSPI_CS_GPIO_PORT               GPIOB
#define QSPI_CS_GPIO_AF                 GPIO_AF10_QUADSPI //注意修改 GPIO_AF10_QUADSPI GPIO_AF9_QUADSPI#define QSPI_CLK_PIN                    GPIO_PIN_2
#define QSPI_CLK_GPIO_PORT              GPIOB
#define QSPI_CLK_GPIO_AF                GPIO_AF9_QUADSPI#define QSPI_BK1_D0_PIN                 GPIO_PIN_11
#define QSPI_BK1_D0_GPIO_PORT           GPIOD
#define QSPI_BK1_D0_GPIO_AF             GPIO_AF9_QUADSPI#define QSPI_BK1_D1_PIN                 GPIO_PIN_12
#define QSPI_BK1_D1_GPIO_PORT           GPIOD
#define QSPI_BK1_D1_GPIO_AF             GPIO_AF9_QUADSPI#define QSPI_BK1_D2_PIN                 GPIO_PIN_2
#define QSPI_BK1_D2_GPIO_PORT           GPIOE
#define QSPI_BK1_D2_GPIO_AF             GPIO_AF9_QUADSPI#define QSPI_BK1_D3_PIN                 GPIO_PIN_13
#define QSPI_BK1_D3_GPIO_PORT           GPIOD
#define QSPI_BK1_D3_GPIO_AF             GPIO_AF9_QUADSPI
void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi)
{GPIO_InitTypeDef GPIO_InitStruct;/* 使能QPSI时钟  */QSPI_CLK_ENABLE();/* 复位时钟接口 */QSPI_FORCE_RESET();QSPI_RELEASE_RESET();    /* 使能GPIO时钟 */QSPI_CS_GPIO_CLK_ENABLE();QSPI_CLK_GPIO_CLK_ENABLE();QSPI_BK1_D0_GPIO_CLK_ENABLE();QSPI_BK1_D1_GPIO_CLK_ENABLE();QSPI_BK1_D2_GPIO_CLK_ENABLE();QSPI_BK1_D3_GPIO_CLK_ENABLE();/* QSPI CS GPIO 引脚配置 */GPIO_InitStruct.Pin = QSPI_CS_PIN;GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;GPIO_InitStruct.Pull = GPIO_PULLUP;GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;GPIO_InitStruct.Alternate = QSPI_CS_GPIO_AF;HAL_GPIO_Init(QSPI_CS_GPIO_PORT, &GPIO_InitStruct);/* QSPI CLK GPIO 引脚配置 */GPIO_InitStruct.Pin = QSPI_CLK_PIN;GPIO_InitStruct.Pull = GPIO_NOPULL;GPIO_InitStruct.Alternate = QSPI_CLK_GPIO_AF;HAL_GPIO_Init(QSPI_CLK_GPIO_PORT, &GPIO_InitStruct);/* QSPI D0 GPIO pin 引脚配置 */GPIO_InitStruct.Pin = QSPI_BK1_D0_PIN;GPIO_InitStruct.Alternate = QSPI_BK1_D0_GPIO_AF;HAL_GPIO_Init(QSPI_BK1_D0_GPIO_PORT, &GPIO_InitStruct);/* QSPI D1 GPIO 引脚配置 */GPIO_InitStruct.Pin = QSPI_BK1_D1_PIN;GPIO_InitStruct.Alternate = QSPI_BK1_D1_GPIO_AF;HAL_GPIO_Init(QSPI_BK1_D1_GPIO_PORT, &GPIO_InitStruct);/* QSPI D2 GPIO 引脚配置 */GPIO_InitStruct.Pin = QSPI_BK1_D2_PIN;GPIO_InitStruct.Alternate = QSPI_BK1_D2_GPIO_AF;HAL_GPIO_Init(QSPI_BK1_D2_GPIO_PORT, &GPIO_InitStruct);/* QSPI D3 GPIO 引脚配置 */GPIO_InitStruct.Pin = QSPI_BK1_D3_PIN;GPIO_InitStruct.Alternate = QSPI_BK1_D3_GPIO_AF;HAL_GPIO_Init(QSPI_BK1_D3_GPIO_PORT, &GPIO_InitStruct);
}void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi)
{/* 复位QSPI引脚 */HAL_GPIO_DeInit(QSPI_CS_GPIO_PORT, QSPI_CS_PIN);HAL_GPIO_DeInit(QSPI_CLK_GPIO_PORT, QSPI_CLK_PIN);HAL_GPIO_DeInit(QSPI_BK1_D0_GPIO_PORT, QSPI_BK1_D0_PIN);HAL_GPIO_DeInit(QSPI_BK1_D1_GPIO_PORT, QSPI_BK1_D1_PIN);HAL_GPIO_DeInit(QSPI_BK1_D2_GPIO_PORT, QSPI_BK1_D2_PIN);HAL_GPIO_DeInit(QSPI_BK1_D3_GPIO_PORT, QSPI_BK1_D3_PIN);/* 复位QSPI */QSPI_FORCE_RESET();QSPI_RELEASE_RESET();/* 关闭QSPI时钟 */QSPI_CLK_DISABLE();
}

🌿 FlashDevice结构体信息（需要根据QSPI flash容量进行配置）

/* This structure containes information used by ST-LINK Utility to program and erase the device */
#if defined(__ICCARM__)
__root struct StorageInfo const StorageInfo = {
#else
struct StorageInfo const StorageInfo = {
#endif"STM32H750_ART_W25Q64JV",    // Device Name + EVAL Borad nameSPI_FLASH,                 // Device Type0x90000000,                // Device Start Address0x00800000,                // Device Size in Bytes (8MBytes)0x1000,                    // Programming Page Size 256Bytes0xFF,                      // Initial Content of Erased Memory// Specify Size and Address of Sectors (view example below){{0x00000800, 0x00001000,},     // Sector Num : 2048 ,Sector Size: 4KBytes{0x00000000, 0x00000000,}}
};

🌿时钟信息（时钟源可以选择;外部时钟源、内部时钟源）

/*** @brief System Clock Configuration* @retval None*  HSE:25MHz*/
void SystemClock_Config(void)
{RCC_OscInitTypeDef RCC_OscInitStruct = {0};RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
//  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};/** Supply configuration update enable*/HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);/** Configure the main internal regulator output voltage*/__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}/** Initializes the RCC Oscillators according to the specified parameters* in the RCC_OscInitTypeDef structure.*/RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;RCC_OscInitStruct.HSEState = RCC_HSE_ON;RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;RCC_OscInitStruct.PLL.PLLM = 5;RCC_OscInitStruct.PLL.PLLN = 192;RCC_OscInitStruct.PLL.PLLP = 2;RCC_OscInitStruct.PLL.PLLQ = 2;RCC_OscInitStruct.PLL.PLLR = 2;RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;RCC_OscInitStruct.PLL.PLLFRACN = 0;if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK){Error_Handler();}/** Initializes the CPU, AHB and APB buses clocks*/RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK){Error_Handler();}/*使用IO的高速模式，要使能IO补偿，即调用下面三个函数 （1）使能CSI clock（2）使能SYSCFG clock（3）使能I/O补偿单元， 设置SYSCFG_CCCSR寄存器的bit0*/__HAL_RCC_CSI_ENABLE() ;__HAL_RCC_SYSCFG_CLK_ENABLE() ;HAL_EnableCompensationCell();__HAL_RCC_D2SRAM1_CLK_ENABLE();__HAL_RCC_D2SRAM2_CLK_ENABLE();__HAL_RCC_D2SRAM3_CLK_ENABLE();
}