Chapter 10 Initialization
第10章 初始化
After a signal on the RESET pin, certain registers of the 80386 are set to predefined values. These values are adequate to enable execution of a bootstrap program, but additional initialization must be performed by software before all the features of the processor can be utilized.
在REST引脚发送信号后，80386的某些寄存器被设置为预定的值。这些值仅够用来执行启动（bootstrap）程序，但在所有的处理器特性可以被使用这衫，还必须由软件执行额外的初始化。
10.1 Processor State After Reset
重置后的处理器状态
The contents of EAX depend upon the results of the power-up self test. The self-test may be requested externally by assertion of BUSY# at the end of RESET. The EAX register holds zero if the 80386 passed the test. A nonzero value in EAX after self-test indicates that the particular 80386 unit is faulty. If the self-test is not requested, the contents of EAX after RESET is undefined.
EAX的内容取决于加电自检的结果。自检可以由外部要求，即在REST之后测试BUSY#。如果80386通过了自检，EAX中的值是0。自检后的非0值表明，80386的特定单元有错误。如果没有要求自检，REST之后的EAX中的值是未定义的。
DX holds a component identifier and revision number after RESET as Figure 10-1 illustrates. DH contains 3, which indicates an 80386 component. DL contains a unique identifier of the revision level.
REST之后，DX中值是组件的标识和版本号，见图10-1的解释。DH中包含3位80386的组件标识。DL中包含一个唯一的版本标识。
Control register zero (CR0) contains the values shown in Figure 10-2 . The ET bit of CR0 is set if an 80387 is present in the configuration (according to the state of the ERROR# pin after RESET). If ET is reset, the configuration either contains an 80287 or does not contain a coprocessor. A software test is required to distinguish between these latter two possibilities.
控制寄存器0（CR0）包含一个图10-2所示的值。如果配置（根据在REST之后，ERROR#的状态）中存在80387，则CR0的ET位被置位。如果ET被重置，配置要么包含一个80287，要么不包含协处理器。软件要通过测试来区分这二者的可能性。
The remaining registers and flags are set as follows:
剩余的寄存器和标志被设置成如下所示：
EFLAGS =00000002H
IP =0000FFF0H // 这里是BIOS开始的地方
CS selector =000H
DS selector =0000H
ES selector =0000H
SS selector =0000H
FS selector =0000H
GS selector =0000H
IDTR:
base =0
limit =03FFH
All registers not mentioned above are undefined.
所有上面没有提到的寄存器都是未定义状态。
These settings imply that the processor begins in real-address mode with interrupts disabled.
这些设置表明，处理器开始在关中断的实地址模式。
